Device design and development

The state of current memory technologies is illustrated in Fig. 1.5 in terms of storage capacity vs. speed. It is noticeable that these quantities anticorrelate, the high storage density of FLASH, which is relatively slow, taking one extreme while MRAM and SRAM are fast, low storage capacity memory technologies. We illustrate an estimate of the location of the PETMEM on the diagram, which excels in speed and also in low voltage/power. For the low voltage low power niche, it would be acceptable to sacrifice density for voltage and speed with denser serving as long term storage in PET solution (analogous to disk).

Plot of storage capacity vs. programming speed for contemporary memory technologies, showing the inverse correlation between storage and speed. The PETMEM advantages are in speed and low voltage (power).

The state of the art in novel lower power device electronics has taken three development paths:

  1. Energy filtering as in the tunnel-FET which cuts off the high-energy tail of the Boltzmann carrier distribution in the source contact.
  2. Internal Potential Step-up as in the ferroelectric (FE)-gate FET and quantum capacitive (QC) devices which allow a small gate voltage swing to produce a larger swing in the internal potential in the gate.
  3. Internal Transduction as exemplified by the spin-FET and Nano-electro-mechanical (NEM) switch which transduces a voltage to an internal state which is gated and then transduced back to a voltage state.

 

 

None of these devices have, as yet, been demonstrated as a fast, low-voltage switch. For example, a successful spin-FET will require the development of spin-filters with polarization purity orders of magnitude better than what has been demonstrated to date, while the NEM switch, while capable of low voltage switching, appears to be too slow to serve as an FET replacement.

 

The PiezoElectronic transistor (PET), the technology underlying PETMEM, is a novel device concept which uses principles 3 and 2 above to convert an electrical signal to acoustic form, enhance it via mechanical design, and reconvert to electrical form. ON/OFF ratios > 104 are predicted (103 has already been demonstrated for 107 test limited cycles). Switching times of a few picoseconds at voltages of order 0.1 V are expected at scale. The figure directly above comparing modelled switching energy vs. clock frequency of different devices at 11 nm scale shows that the PET can operate at 1/50th the energy of the FINFET at the same speed (4 GHz). PiezoElectronics allows full conventional computer logic to be implemented. The PET is, thus, much better positioned to replace the FET in nearly all computer applications than currently available alternatives.

 

In order to form a complete computing technology, a low voltage high speed memory is needed to synergize with PiezoElectronic transistor (PET) logic. Developing a PiezoElectronic Transduction memory (PETMEM) for this purpose is the objective of the present proposal. The combined PiezoElectronic logic+memory technology offers higher energy efficiency, reduction of device/circuit/system power consumption, and hence improved performance without cost increase. The PET solution is applicable across a wide range of computing application spaces.

 

We are now in a position to further discuss the memory landscape of Fig. 1.5. Consider an exemplar comparison between PETMEM and MRAM, PCM and Flash. The PETMEM is beyond the state of the art for several reasons. First, MRAM and PCM are not low power technologies. PCM requires heating of a material to transform its state (slow anneal to crystal, fast quench to amorphous form) and this requires a large drive transistor. If lower power is used in the conversion process, frequent refresh times are needed. MRAM like the spin-FET, needs new materials to emerge. To get to a low power memory, a perpendicular technology must emerge as has been implemented in the hard disk industry. Research is underway using recent developments but the power is still high compared to PETMEM. Flash switching time is very slow. Experts will note that wire charging is becoming an increasingly dominant part of memory power budget, and lowering the voltage is only way to decrease power budget for given topology making the PETMEM a clear winner. Finally, it is also a far easier integration task to make full memory cells including transistor access devices from related technologies (PET’s and PETMEM’s) than two disparate technologies and materials sets. Thus, it is important to develop PETMEM’s if a complete new low power solution for the IT industry is to emerge.